.. _iq_modulator:

iq_modulator
============

Description
'''''''''''

| 

Pinout
''''''

.. _fig:iq_modulator_block:
.. figure:: iq_modulator_block.png
    :alt: Schematic symbol

Parameters
''''''''''

.. list-table:: iq_modulator_param_table
   :header-rows: 1

   * - Name
     - Min
     - Max
     - Default
     - Description
   * - WIDTH
     - ?
     - ?
     - 16
     - 
   * - zero_bias
     - ?
     - ?
     - 0
     - 

Ports
'''''

.. list-table:: iq_modulator_port_table
   :header-rows: 1

   * - Signal
     - Direction
     - Description
   * - clk
     - Input
     - 
   * - sin[WIDTH-1:0]
     - Input
     - 
   * - cos[WIDTH-1:0]
     - Input
     - 
   * - d_out[WIDTH-1:0]
     - Output
     - 
   * - ampi[WIDTH-1:0]
     - Input
     - 
   * - ampq[WIDTH-1:0]
     - Input
     - 

Implementation and use
''''''''''''''''''''''

The `portable`_ `Verilog`_
implementation can be found in :ref:`iq_modulator_source`

.. _`portable`: https://en.wikipedia.org/wiki/Software_portability
.. _`Verilog`: https://en.wikipedia.org/wiki/Verilog