Attention

This documentation is a work in progress. Expect to see errors and unfinished things.

fchan_subset

Description

Name: Channel Subset

% Runtime-configurable selection of which data to keep within each block

% Typically used on the input to a waveform memory

Pinout

Parameters

Table 52 fchan_subset_param_table

Name	Min	Max	Default	Description
KEEP_OLD	?	?	0
a_dw	?	?	20
o_dw	?	?	20
len	?	?	16

Ports

Table 53 fchan_subset_port_table

Signal	Direction	Description
clk	Input
reset	Input
keep[len-1:0]	Input
a_data[a_dw-1:0]	Input
a_gate	Input
o_data[o_dw-1:0]	Output
o_gate	Output
time_err	Output

Implementation and use

The portable Verilog implementation can be found in fchan_subset Source File