Attention
This documentation is a work in progress. Expect to see errors and unfinished things.
serialize
Description
Encapsulation of the serialization step in LBNL’s conveyor belt
Instantiated by e.g., serializer_multichannel.v
Pinout
Parameters
Name |
Min |
Max |
Default |
Description |
---|---|---|---|---|
dwi |
? |
? |
28 |
result width |
Ports
Signal |
Direction |
Description |
---|---|---|
clk |
Input |
timespec 8.4 ns |
samp |
Input |
Snap signal for data_in |
data_in[dwi-1:0] |
Input |
|
stream_in[dwi-1:0] |
Input |
|
stream_out[dwi-1:0] |
Output |
|
gate_in |
Input |
|
gate_out |
Output |
|
strobe_out |
Output |
Implementation and use
The portable Verilog implementation can be found in serialize Source File