Attention

This documentation is a work in progress. Expect to see errors and unfinished things.

Welcome to Bedrock’s documentation!

This document is the user’s manual of Bedrock, largely an accumulation of Verilog codebase written over the past several years at LBNL. It contains platform-independent Verilog, and whatever it takes to get it onto FPGA platforms like Xilinx etc. The public development mirror is the Bedrock Github Repository.

Contents:

Indices and tables