Attention

This documentation is a work in progress. Expect to see errors and unfinished things.

iq_deinterleaver_multichannel

Description

Pinout

Parameters

Table 76 iq_deinterleaver_multichannel_param_table

Name	Min	Max	Default	Description
NCHAN	?	?	2
SCALE_WI	?	?	18
DWI	?	?	16
DAVR	?	?	4

Ports

Table 77 iq_deinterleaver_multichannel_port_table

Signal	Direction	Description
clk	Input
scale_in[SCALE_WI-1:0]	Input
iq_data_in[NCHAN*DWI-1:0]	Input
iq_sel	Input
valid_out	Output
i_data_out[NCHAN*(DWI+DAVR)-1:0]	Output
q_data_out[NCHAN*(DWI+DAVR)-1:0]	Output

Implementation and use

The portable Verilog implementation can be found in iq_deinterleaver_multichannel Source File